Applications of AI/ML to Analog and Mixed Signal Circuit Design

Understanding and leveraging open source machine learning frameworks for the automated design of analog and mixed signal circuits.

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Analog, mixed-signal and RF circuit design is an entirely manual process. The process of engineering relies on developing a "feel" for things by doing it over and over; by learning what works and what does not. Intuition is the currency with which we build our engineering careers and take pride in thinking it is irreplaceable. But is it?

The age of AI is upon us. The internet is rife with people and businesses trying to harness the power of AI to usher us into a new technological era. But to what extent can we teach machines to have the intuition we do?

In this article, we will learn about four machine-learning based frameworks that address the problem of automatic analog design generation:

• Berkeley Analog Generator: End-to-end design tool that generates schematics, layouts and automatically extracts parasitics.

• AutoCkt: A reinforcement learning based framework that uses 10x fewer simulations to reach an optimum design solution than state-of-the-art today.

• ALIGN: An automatic layout generation tool that builds with hierarchy.

• MAGICAL: A hierarchy-based layout generator that accounts for layout symmetry requirements.

Let’s dive in! Feel free to skip to the key takeaways at the end if you’re short on time.

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Automatic Design Generation

Aside from the race to implement silicon for transformer-based AI, the excitement for engineering work comes from the generative nature of AI. The prospect of simply "asking" the AI to design an electronic circuit and have it generate a fully working design that is more optimized than any human is capable of, is undeniably attractive. The ability to generate images using tools like DALL-E, Midjourney and Stable Diffusion, and video using Sora, leads us to imagine that we can generate chip layouts the same way. With sufficient resources, years of error prone human effort would be replaced by hours of reproducible machine design. That's the utopian dream anyway.

For engineering work, optimization algorithms, machine learning techniques and neural networks have been the bread and butter for intelligent, automated design. The advent of large language models has stirred up a new flurry of interest in these areas under the moniker of AI. But even in the pre-transformer era of AI, researchers have focused on using machine learning to solve one pressing problem in analog design: Automated Design Generation.

The Problem of Analog Design

While digital layout today is done using place and route, analog and mixed-signal layout is done manually by highly skilled engineers making it a time consuming process. The design complexity involved is much higher to ensure layout symmetry, minimize losses and dispersion, and account for coupling effects and parasitics.

Layout parasitics dictate that the schematic values need redesign once they are taken into account. The iterative loop of schematic design, layout generation, parasitic extraction and performance evaluation constitutes a large, time-consuming portion of the design process.

Past attempts to automate analog layout generation have not always stuck in industry. EDA giants like Cadence Design Systems and Synopsys have provided tools for automated layout generation from schematics. The results, however, do not always appeal to the "aesthetic" of the experienced circuit designer. It is the underlying belief (and probably rightly so), that aesthetic designs are robust to layout effects which are not often modeled precisely.

There are several reasons why automated analog layout has greater relevance today than ever before:

1. Modern technology nodes have highly restrictive design rules, which:

   1. Makes it hard to generate designs manually

   2. Reduces the overall design space to be explored for layout generation

2. The need for analog content is increasing, experienced designers are in short supply, design cycle times are shrinking while specifications are getting more challenging.

3. Portability of designs between technology nodes is essential for a variety of technology and business reasons. We need ways to quickly translate designs.

4. The advent of machine learning techniques and now transformer-based AI provides new opportunities for solving the automated analog design problem.

In essence, we need tools to translate a design specification into schematics and layouts that meet specifications and are manufacturable, with minimal human intervention. We will look at a few such frameworks that enable this today.

Berkeley Analog Generator (BAG)

Berkeley Analog Generator (BAG) is a python-based framework for analog and mixed-signal circuit generation. It is much more than a simple optimization tool. With just the circuit template netlist and target specifications as input, it iteratively performs parasitic-aware simulations to converge on a working schematic and layout.

A detailed design flow looks something like this:

1. Schematic Template: A designer creates a circuit schematic appropriate for the design. BAG will create designs by copying and modifying this template.

2. Parameterize: The designer chooses the parameters in the design such as transistor dimensions as variables that need to be determined.

3. Generators: The designer writes a schematic generator using the BAG python API. The schematic generator will convert the template into circuit instances with various parameter combinations on the fly. The designer also writes a layout generator using two process-independent layout engines provided by BA, called Xbase and Laygo. This produces DRC/LVS clean layouts, and parasitic extractions.

4. Design Script: The designer writes a script to design the circuit. It involves the following steps:

   1. Obtain a good guess starting point for the design parameters.

   2. Specify measurement parameters of the circuit (like gain and bandwidth).

   3. Evaluate the results of the schematic and layout generators. BAG will automatically setup testbenches, perform simulations and calculate circuit performance with extracted netlists.

   4. Compare circuit specification with the simulation result, and generate new set of parameters for the generators.

   5. Automatically iterate till the desired result is reached.

Berkeley Analog Generator Design Flow (source: Chang et al.)

Using this method, researchers have generated the full design of a time-interleaved successive approximation analog-to-digital converter (SAR ADC) and a SerDes transceiver front-end in TSMC 16nm process, which they then proceeded to easily replicate to other process nodes from both TSMC and GlobalFoundries. Read the original paper if you're interested in more details.

Time-interleaved SAR ADCs designed using Berkeley Analog Generator in different technology nodes. (source: Chang et al.)

AutoCkt

AutoCkt takes BAG to the next level. The problem with BAG was that it needed an initial design point, and then iteratively found its way to an optimum solution. This presents two challenges:

1. Optimization methods that randomly sample an initial space do not always converge.

2. If design specification changes, the optimization needs to restart from scratch.

Instead what we want is to approach the problem like a human designer would. By intuitively understanding the design space available, we would like an algorithm to learn the trade-offs between different target specifications across the design space.

AutoCkt does this with a reinforcement learning (RL) agent that uses a trial and error process like a human would. If there are multiple parameters to be optimized in the design, the combination of all these parameters constitutes the design space. Each set of parameters gives a simulated result, which is compared to the required specification.

The reinforcement learning process involves the following steps:

1. Trajectory Generation: It starts with an initial parameter set in the middle of the design space and keeps iterating till the simulated result meets the specification. The generation of one trajectory is said to be complete.

2. RL Agent Training: Select several randomly selected target specifications (say 50). Generate trajectories for each of these specifications. Depending on how close the final result comes to the specification, give each trajectory a score. The training ends when all 50 specifications are met based on a threshold trajectory score.

Now, if you provide a new specification not contained in the training, the RL agent knows the best trajectory closest to the specification you provided. If the trajectory is known, then you have a really good starting point for the design. As a result, you will need to iterate much lesser to get to the correct design parameter set.

Design flow using AutoCkt (source: https://arxiv.org/pdf/2001.01808.pdf)

AutoCkt uses BAG to generate simulation data for the entire training process. As a result, parasitics from layout are already included in the training space and the final parameter set from the RL agent will provide a value close to the final result.

The authors of the original paper show that AutoCkt requires 10 times fewer iterations than the current best approach that uses a combination of genetic algorithms and machine learning. They show that they can generate 40 LVS passing designs for a 2-stage OTA with negative gm load in less than 3 days with a 1-core CPU. That's awesome.

ALIGN and MAGICAL

So far, we have simply discussed layout generation without any concern for how it is implemented. No real designer would like to have a "flat" layout without a hierarchy of building blocks. Its not the way things are done in the human world.

The programmatic answer to this is ALIGN (Analog Layout, Intelligently Generated from Netlists). This is an open source automatic layout generation flow for analog circuits which translates an input netlist to an output GDSII layout, specific to a given technology, but with an added feature.

ALIGN attempts to build IC layouts much like a human would. This involves identifying layout hierarchies, generating layouts of the building blocks and then assembling them at each level of the layout hierarchy. For example, the lowest level of hierarchy would be an individual transistor. They are used to generate primitives such as current mirrors and differential pairs, which are then assembled into modules such as transconductance amplifiers. Using these modules, the system such as an RF transceiver is built.

Design flow using ALIGN (source: https://arxiv.org/pdf/2008.10682.pdf)

Another open source project that attempts automatic analog layout generation is MAGICAL, which is described as "a human-intelligence inspired, fully-automated analog IC layout system" that is funded by the DARPA IDEA program.

The overall flow is the similar to ALIGN from what I can tell. Take an input netlist and generate an optimized layout with an emphasis on generating layouts hierarchically. The main differences comes from the considerations of circuit symmetry requirements that MAGICAL recognizes.

For example, MAGICAL places emphasis in making sure that differential transistors are matched by identifying transistor sources that are connected to each other to form a virtual ground, based on a process called "seed pattern detection." It also places appropriately matched passive elements. As a final step, the layout is post-processed to identify additional sources of symmetry that might have been missed in the first attempt, such as bias circuit symmetry by looking for common gate or diode connected transistors.

Publications using both these tools show that they are capable of producing designs that match in performance to a circuit designed by a human.

Design flow using MAGICAL (source: https://par.nsf.gov/servlets/purl/10192511)

In Closing

Recently, a startup company called Astrus is looking at commercializing analog layout generation out of Toronto, Canada. Co-founded by Brad Moon and Zeyi Wang, they recently announced a $2.4M pre-seed funding round. Moon says that analog layout generation presents a very-specific, high value problem to the 60,000 or so analog designers globally. With increasing chip demand and shortage of highly skilled analog engineers, Astrus has a multi-million dollar opportunity on their hands.

As exciting as these advancements are, machine-based designs will never completely displace analog and mixed-signal design engineers. What will change is the way we will operate as designers. Instead of manually placing circuit components and drawing wires on a schematic tool, machine intelligence will help us automate away the boring parts so that we can focus on great circuit ideas instead.

All of what we discussed still has not harnessed the power of generative pre-trained transformer (GPT) based AI. The best is yet to come.

If this article had too much detail, check out this video from Jon Y from the Asianometry YouTube channel that explains why analog circuits are so hard to do, and how AI is positioning itself to help. It’s a good one!

🔑 Key Takeaways

• Automated design tools aim to address the scarcity of skilled analog designers and reduce design cycle times by translating design specifications into manufacturable layouts with minimal human intervention.

• Machine learning frameworks like Berkeley Analog Generator and AutoCkt are automate the generation of schematics, layouts, and optimum designs.

• ALIGN and MAGICAL offer open-source solutions for automatic layout generation, focusing on hierarchy and layout symmetry, to produce designs that compete with human-generated layouts.

• The field is ripe for commercialization, as demonstrated by startups like Astrus, indicating a significant market opportunity to address the challenges in analog circuit design with AI and machine learning technologies.

• The advent of AI in analog design doesn't aim to replace engineers but to augment their work, allowing them to focus on innovation rather than manual layout tasks.

📚 Resources

• B. Xu et al., “MAGICAL: Toward Fully Automated Analog IC Layout Leveraging Human and Machine Intelligence: Invited Paper,” in 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Westminster, CO, USA: IEEE, Nov. 2019.

• E. Chang et al., “BAG2: A process-portable framework for generator-based AMS circuit design,” in 2018 IEEE Custom Integrated Circuits Conference (CICC), San Diego, CA: IEEE, Apr. 2018.

• K. Settaluri, A. Haj-Ali, Q. Huang, K. Hakhamaneshi, and B. Nikolic, “AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs.” arXiv, Jan. 20, 2020.

• T. Dhar et al., “ALIGN: A System for Automating Analog Layout.” arXiv, Aug. 24, 2020.

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The views, thoughts, and opinions expressed in this newsletter are solely mine; they do not reflect the views or positions of my employer or any entities I am affiliated with. The content provided is for informational purposes only and does not constitute professional or investment advice.